In recent years, field effect transistors (referred hereinafter to as FETs) made of gallium nitride (GaN)-based materials have been actively studied as high-frequency, high-power devices. Since nitride semiconductor materials such as GaN can be mixed with aluminum nitride (AlN), indium nitride (InN), and the like to form various types of mixed crystals, they can form heterojunctions like conventional compound-semiconductor materials such as gallium arsenide (GaAs). In the heterojunction composed of the nitride semiconductor, however, spontaneous polarization or piezoelectric polarization in the film constituting the junction generates high concentrations of carriers at its heterointerface even with no doping performed thereon. As a result of this, in the case where a FET is fabricated from this material, the fabricated FET is likely to exhibit depletion type (normally-on type) characteristics, and hence it is difficult for the FET to exhibit enhancement-type (normally-off type) characteristics. However, most devices currently used in the power electronics market are normally-off type devices, so that normally-off type GaN-based nitride semiconductor devices are strongly demanded.
Hereinafter, a conventional FET using a nitride semiconductor material will be described.
FIG. 9 is a sectional view of the conventional FET using AlGaN/GaN heterojunction, and FIG. 10 is a diagram showing distribution of fixed charges and free electrons induced by polarization in the conventional FET shown in FIG. 9. FIG. 11 is an energy band diagram of the conventional FET, and FIG. 12 is a graph plotting the relation between the gate voltage and the drain current obtained from such a FET using two-dimensional electron gas as a carrier.
Referring to FIG. 9, the conventional FET formed of a nitride semiconductor includes: a sapphire substrate 1901 having the (0001) plane as a principal plane; an undoped GaN layer 1902 provided on the sapphire substrate 1901; an undoped AlGaN layer 1903 provided on the undoped GaN layer 1902; a source electrode 1905 and a drain electrode 1906 of Ti/Al and a gate electrode 1907 of palladium (Pd), which are provided on the undoped AlGaN layer 1903; and a passivation film 1904 of SiN covering the undoped AlGaN layer 1903. The undoped AlGaN layer 1903 is made of undoped A0.25Ga0.75N.
In the conventional FET shown in FIG. 9, spontaneous polarization and piezoelectric polarization inherent in the materials constituting the undoped AlGaN layer 1903 generate two-dimensional electron gas of about 1×1013 cm−2 at the heterojunction interface between the undoped GaN layer 1902 and the undoped AlGaN layer 1903 even though no impurity is introduced thereinto.
As shown in FIG. 10, negative fixed charges are generated in the top surface of the undoped AlGaN layer 1903 (the surface closer to the gate electrode 1907) and the top surface of the undoped GaN layer 1902, and positive fixed charges are generated in the bottom surface of the undoped AlGaN layer 1903 (the surface closer to the sapphire substrate 1901) and the bottom surface of the undoped GaN layer 1902. Since the absolute value of the amount of fixed charges generated in the AlGaN surface is greater than the absolute value of the amount of fixed charges generated in the GaN surface, sheet carriers with an amount capable of compensating the fixed charge difference therebetween are generated in the form of two-dimensional electron gas in a portion of the heterointerface closer to the undoped GaN layer 1902 (Ns in FIG. 10). Note that in FIG. 10, the solid arrow represents fixed charges generated in the undoped AlGaN layer 1903 and the dashed arrow represents fixed charges generated in the undoped GaN layer 1902.
This polarization generates an electric field in the undoped GaN layer 1902 and the undoped AlGaN layer 1903, and thus the energy band diagram in this state has a profile as shown in FIG. 11. Specifically, the edge of the valence band of the undoped GaN layer 1902 around the heterointerface has a potential energy below the Fermi level. As a result, the conventional FET basically exhibits normally-on type electrical properties as shown in FIG. 12.
Furthermore, the source electrode 1905 and the drain electrode 1906 are in contact with the undoped AlGaN layer 1903. If the thickness of the undoped AlGaN layer 1903 is as small as, for example, 30 nm or smaller, a channel region (a portion of the undoped GaN layer 1902 in this structure) where two-dimensional electron gas is generated is electrically connected by a tunnel current to the source electrode 1905 and the drain electrode 1906. Therefore, the source electrode 1905 and the drain electrode 1906 can both function as good ohmic electrodes. In addition, since the gate electrode of Pd has a work function as great as 5.1 eV, it can function as a good Schottky junction to the undoped AlGaN layer 1903 (see Non-Patent Document 1).
In order to exhibit normally-off characteristics using the GaN-based semiconductor material with the above-shown polarization, it is necessary to reduce carriers generated in the channel by spontaneous polarization and piezoelectric polarization inherent in the crystal. In the case of the FET using the heterojunction composed of AlGaN and GaN, decreasing the Al composition in the AlGaN layer reduces stress caused by the lattice constant difference from GaN. This reduces piezoelectric polarization, resulting in a decrease in sheet carrier concentration (see Non-Patent Document 2). To be more specific, when the Al mole fraction in the undoped AlGaN layer 1903 is decreased to 0.15 with its thickness kept to 30 nm, the sheet carrier concentration significantly decreases from 1.4×1013 cm−2 to 5×1012 cm−2. A decrease in carrier concentration in turn reduces operating current. In addition to this, decreasing the Al composition in the undoped AlGaN layer 1903 also lowers the potential barrier of the gate portion.
In order to suppress the occurrence of leakage current in the gate electrode, the forward voltage capable of being applied to the gate electrode 1907 has an upper limit. This makes it impossible to raise the gate voltage, and thus a sufficient increase in the drain current is also difficult.
To deal with such a difficulty and provide a normally-off type transistor capable of applying a high forward voltage, proposal is made of the structure in which a gate portion is formed of a p-type region to enhance the potential barrier. This is the structure of a junction field effect transistor (abbreviated hereinafter as a JFET). The JFET is described in Non-Patent Document 3 and Patent Document 1.
[Non-Patent Document 1] M. Hikita et al., Technical Digest of 2004 International Electron Devices Meeting (2004) pp. 803-806
[Non-Patent Document 2] O. Ambacher et al., J. Appl. Phys. Vol. 85 (1999) pp. 3222-3233
[Non-Patent Document 3] L. Zhang et al., IEEE Transactions on Electron Devices, vol. 47, no. 3, pp. 507-511, 2000
[Patent Document 1] Japanese Unexamined Patent Publication No. 2004-273486